1. Field of the Invention
The present invention relates to semiconductor packaging, and more particularly to a semiconductor package with an electrically-conductive strap for power applications.
2. Description of the Related Art
Integrated circuit die are conventionally enclosed in plastic packages that provide protection from hostile environments and enable electrical interconnection between the integrated circuit die and printed circuit boards. The package elements may include, for example, a metal leadframe, a die, bonding material to attach the die to the leadframe, bond wires that electrically connect pads on the die to individual leads of the leadframe. A hardened plastic encapsulant material typically covers the die, the bond wires, at least a portion of the leadframe, and forms the exterior of the package.
The leadframe is typically the central supporting structure of such a package. A portion of the leadframe is internal to the package. That is, the plastic encapsulant material conventionally surrounds a central portion of the leadframe with lead portions of the leadframe extending externally outward from the sides of the package. The externally extending lead portions may be used to connect the package to external circuitry.
In conventional eight-lead, small outline integrated circuit (xe2x80x9cSOIC-8xe2x80x9d) high-power metal-oxide-semiconductor field effect transistor (xe2x80x9cPMOSFETxe2x80x9d) packages, the sources and drains of the individual transistor devices of the PMOSFET are typically connected in parallel by respective thin layers of metal on the opposed surface of the die, which, in turn, are electrically coupled to the leads of the package. This thin layer of metal, in turn, is externally connected to each of three leads of the package.
In conventional versions of this type of package, the conductive layer spanning the sources of the individual transistor devices are connected to the leads (or an intermediate structure) of a package substrate by a relatively large number (typically 14) of parallel bond wires. However, these wires have contributed to a number of problems associated with this type of device, including relatively high internal thermal and electrical resistances.
More recently, it has been learned that at least some of the foregoing problems can be alleviated by replacing the large number of bond wires with a single, elongated conductive strap that connects the thin layer of metal on top of the die to the source leads of the substrate. This approach, however, has also been somewhat problematic due to the inability of this design to effectively dissipate heat generated by the die. Accordingly, a need exists to provide a semiconductor package that provides for greater, or improved, heat dissipation capabilities.
A semiconductor package is provided that includes a die pad with a semiconductor die disposed thereon and a plurality of leads electrically coupled to the die via a conductive strap. Each of the leads has opposing first and second surfaces. An encapsulant material encapsulates the die, at least a portion of the die pad, at least a portion of the strap, and at least a portion of lead first surfaces. Second surfaces of the leads may be exposed in a plane of a horizontal exterior surface of the encapsulant, thereby permitting external electrical connectivity to the package and dissipation of heat through the lead second surfaces. A surface of the die pad and/or leads connected to the die pad also may be exposed at the horizontal exterior package surface. The exposed surfaces of the die pad and leads may be adjacent to or surrounded by recessed surfaces that are under-filled by the encapsulant material and are thus locked to the encapsulant material.
In one embodiment, a portion of the conductive strap is exposed through, and may be substantially flush with, a horizontal exterior surface of the encapsulant material opposite the die pad and leads. The exposed lead surfaces, the exposed portion of the conductive strap, and the exposed portion of the die pad provide multiple thermal paths for dissipation of heat generated by the die to the external environment.
A power MOSFET embodiment of the package conforms to a standard eight-lead small outline integrated circuit (SOIC-8) package style and has better heat dissipation capabilities than conventional SOIC-8 packages. In addition, because the leads and die pad are in the plane of the horizontal exterior surface, the package is very thin.
The present invention is best understood by reference to the following detailed description when read in conjunction with the accompanying drawings.